The present invention relates to data communication systems, and more particularly to a circuit permitting a plurality of processor units in a communications network to communicate on a serial bus.
In one common type of communications network a number of processor units are connected to a single serial data communications bus which comprises any one or a plurality of transmitting media, such as coaxial cable, optical fiber, or others. The processor units connected to the serial bus will hereinafter be designated as stations.
Any particular station may comprise a variety of hardware elements and may be dedicated to various purposes. For example, a single network may comprise stations dedicated to a specific control or monitor task, stations dedicated to data accumulation or analysis, and stations dedicated to peripheral equipment for user input and output. Each station has in common a transmitter-receiver unit, which enables the station to communicate with any of the other stations connected to the serial bus.
An important characteristic of this typical communication network is that no dedicated station is provided for controlling the serial bus communications. As a result, communications in this network are not crippled by the failure of a single station. There remains, however, the problem of arbitrating orderly access to the single serial bus among the plurality of connected stations.
Typical of the known prior art is U.S. Pat. No. 4,063,220. In this scheme, transmissions are removed from the serial bus by a receiver and passed to the receiver logic, where the message is decoded to ascertain the intended destination. If the transmission was directed to the receiving station, error checks are performed and the message is passed to the station using device through the input buffer.
Messages originating from the station using device are passed through the output buffer to the transmitter logic. Here, the message is coded for transmission through the transmitter. The combination of the transmitter logic and the collision detection logic performs the service of defining when a transmission may be made. According to this prior art scheme, a station may issue a transmission after determining that the serial bus has been silent for a given period of time. If, after the initial transmission, no collision between transmissions of two or more stations are detected, the transmitting station acquires access to the bus.
If collisions are detected after the initial transmission, the transmitting station backs off and waits a period of time calculated to avoid further collisions before attempting to transmit again. The station considers the number of previous collisions in calculating the waiting period before each attempted transmission. The process continues until a collision-free transmission is attained.
This prior art scheme works quite well where the frequency of transmissions on the serial bus is low. Occasional collisions do not distort network communications. In networks where the density of transmissions is large due to the length of the transmissions or to the large number of stations in the network, the frequency of collisions between competing transmissions is much greater. The time required for a station in such high density networks to obtain access to the bus is unpredictable and often quite lengthy.
An improved prior art scheme is revealed by Network Systems Corporation (hereinafter NSC) Publication No. A01-0000-02. In this arrangement, each station monitors the serial bus for silence. After a predetermined, unique delay during which the serial bus is determined to be silent, each station is given a time slot during which to initiate a transmission. If no station initiates a transmission during its time slot, the total delay expires and the system reverts to the prior art scheme of transmitting when no transmission is detected on the serial bus. If a collision thereafter occurs, the above-described mechanism for allocation to each station of a unique time slot is activated and each station transmits upon appearance of its time slot.
The NSC arrangement also includes a wait flip-flop mechanism for preventing more than one transmission by any single station until all stations have been given an opportunity to transmit; i.e., until the total delay expires. This mechanism may be active or inactive for any station in the network.
The NSC scheme alleviates many of the problems associated with the collision detection system of U.S. Pat. No. 4,063,220. There remains, however, some situations where the NSC scheme does not yield orderly and collision-free access to the serial bus. One such situation arises in a network comprising several high-priority stations which are very active as well as many other lower priority stations which are less active. With the wait flip-flop mechanism of all stations active, each station in the network would be permitted a single transmission until all stations have had an opportunity to transmit. Upon expiration of the total delay, the orderly allocation of transmissions ceases and any or all stations may issue a transmission. The result is inevitably a collision of transmissions by two or more of the active stations which were prevented from subsequent transmission by their wait flip-flop mechanisms.
Correction of this situation is needlessly time-consuming, especially in a system such as that of NSC where each transmission also results in a pause at all stations so that the receiving station may respond immediately to the transmitting station. The collision problem may be solved by rendering inactive the wait flip-flop mechanism of each high priority station, but such would permit domination of the serial bus by the high priority stations to the exclusion of all other stations.
An additional problem presented by the prior art is a lack of flexibility in the allocation of priority. The priority of a station operating under the NSC scheme is controlled primarily by the state of its wait flip-flop mechanism and secondarily by the position of its time slot relative to the time slots of other stations. A wait flip-flop mechanism in the active state yields a station with a high priority level. This station is subject only to domination by a similar station with a prior time slot. Various combinations of the two factors can yield a variety of systems, but prediction of the average response time for a given station is impossible without accurate knowledge of the frequency of transmission by each station. Such a calculation becomes unmanageable in a network comprising a relatively large number of stations. In short, the prior art schemes render difficult the task of arranging stations in a plurality of distinct priority levels.
Hence, it would be advantageous to develop a bus access arrangement providing for orderly and collision-free access by a plurality of stations to a single serial communications bus. It would further be advantageous if this arrangement did not compromise access time in the achievement of orderly and collision-free access. Finally, it would be advantageous if this arrangement permitted flexibility in the ordering of priority of stations in the network.